Resource Magazine Online: Summer 2007
Micrel Creates Fail-Safe Input for Use in High-Bandwidth Clock and Data Distribution ICs
Solution eliminates need for external termination resistors between the source and destination.
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To achieve the lowest jitter, lowest skew, and fastest clock and data distribution in a system, designers have long utilized differential signaling technology such as LVPECL, CML, or LVDS. More recently, IC suppliers have begun to offer more innovative solutions in this product space with new features such as internal termination, blazing-fast edge rates, extremely low crosstalk-induced jitter, tiny packaging, and fail-safe inputs (FSI).
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